Question

How do you design a low-noise SMPS?

Answer 1

Designing a low-noise Switch Mode Power Supply (SMPS) involves several key considerations to minimize both conducted and radiated electromagnetic interference (EMI). Here’s a detailed breakdown of the design process:

### 1. **Circuit Topology Selection**

Choosing the right topology (e.g., buck, boost, flyback, etc.) can significantly influence noise levels. Each topology has different characteristics regarding efficiency, complexity, and noise generation.

- **Buck Converter**: Ideal for step-down applications, typically has lower noise due to continuous conduction mode operation.
- **Boost Converter**: Suitable for step-up applications but can introduce more noise due to the switch turning off.
- **Flyback Converter**: Common in isolated applications, but can be noisier due to its switching nature.

### 2. **Component Selection**

- **Switching Devices**: Use MOSFETs with low on-resistance and fast switching characteristics to reduce switching losses and ringing.
- **Inductors**: Select inductors with high saturation current ratings and low core losses to minimize noise generation.
- **Capacitors**: Use low-ESR (Equivalent Series Resistance) capacitors to reduce ripple and improve stability. Ceramic capacitors are often preferred for high-frequency applications.
- **Diodes**: Schottky diodes are preferred for their low forward voltage drop and fast recovery times, which reduce switching noise.

### 3. **Layout Design**

Proper PCB layout is crucial for minimizing noise. Consider the following guidelines:

- **Ground Plane**: Use a solid ground plane to minimize ground loops and ensure a low-impedance return path.
- **Trace Widths**: Keep traces short and wide to reduce inductance and resistance, especially for high-current paths.
- **Switching Node**: Keep the switching node (SW) short to reduce parasitic inductance and EMI radiation.
- **Decoupling Capacitors**: Place decoupling capacitors close to the IC pins to filter high-frequency noise effectively.
- **Separate Analog and Power Grounds**: Keep sensitive analog components and power components on separate ground planes to reduce noise coupling.

### 4. **EMI Filtering**

Incorporate input and output filtering to reduce conducted and radiated noise:

- **Input Filter**: Use a common-mode choke and capacitors to filter high-frequency noise from the input power supply.
- **Output Filter**: Include an LC filter at the output to smooth out voltage and reduce ripple.
- **Snubber Circuits**: Use RC snubber circuits across switching devices to dampen voltage spikes and ringing during switching transitions.

### 5. **Control Loop Design**

A well-designed control loop can help reduce noise and improve transient response:

- **Feedback Network**: Ensure proper compensation in the feedback loop to maintain stability and reduce oscillations that can generate noise.
- **PWM Frequency**: Select an appropriate switching frequency. Higher frequencies can allow for smaller components but may increase EMI. Balancing efficiency and noise is essential.

### 6. **Shielding and Enclosures**

If necessary, consider physical shielding to prevent radiated noise from affecting sensitive circuits:

- **Metal Enclosures**: Use metal enclosures to shield against EMI, particularly for sensitive analog circuits.
- **Grounding**: Ensure proper grounding of enclosures to minimize ground loops.

### 7. **Testing and Iteration**

Once the design is complete, thorough testing is necessary to identify and mitigate noise issues:

- **Oscilloscope Measurements**: Use an oscilloscope to observe the output voltage ripple and switching node waveforms for noise.
- **EMI Testing**: Conduct radiated and conducted EMI testing to ensure compliance with regulatory standards.
- **Iterative Design**: Based on test results, iterate the design to improve performance, which may include modifying component values or layout adjustments.

### Conclusion

Designing a low-noise SMPS is a multi-faceted task that involves careful consideration of the circuit topology, component selection, PCB layout, filtering techniques, control loop design, and thorough testing. By following these guidelines and iterating based on performance metrics, you can develop a robust and low-noise power supply suitable for sensitive applications.

Answer 2

Designing a low-noise Switching Mode Power Supply (SMPS) involves several strategies to minimize electromagnetic interference (EMI) and ensure stable performance. Here are some key considerations:

1. **Circuit Topology**:
   - Choose a topology (e.g., flyback, buck, boost) that suits your application and minimizes noise.

2. **Component Selection**:
   - Use low-ESR capacitors to reduce output voltage ripple.
   - Select inductors with high saturation current ratings and low DC resistance to minimize noise.
   - Opt for low-noise switching devices (FETs) and diodes.

3. **PCB Layout**:
   - Keep high-frequency switching paths as short as possible to reduce inductance.
   - Use a ground plane to minimize ground loops and provide a low-impedance return path.
   - Separate the power and signal grounds and connect them at a single point.

4. **Filtering**:
   - Implement input and output filters (e.g., LC filters) to attenuate high-frequency noise.
   - Use common-mode and differential-mode chokes for EMI suppression.

5. **Shielding**:
   - Shield sensitive components and traces to prevent interference from external sources.

6. **Soft Switching Techniques**:
   - Employ techniques like Zero Voltage Switching (ZVS) or Zero Current Switching (ZCS) to reduce switching losses and noise.

7. **Control Loop Design**:
   - Ensure a stable control loop with adequate compensation to avoid oscillations that can introduce noise.

8. **Testing and Optimization**:
   - Use an oscilloscope to monitor noise levels and performance during prototyping.
   - Fine-tune component values and layout based on testing results.

By addressing these areas, you can significantly reduce the noise produced by your SMPS design.